/*
 * @ : Copyright (c) 2021 Phytium Information Technology, Inc. 
 *  
 * SPDX-License-Identifier: Apache-2.0.
 * 
 * @Date: 2021-06-29 09:20:31
 * @LastEditTime: 2021-07-01 17:25:19
 * @Description:  This files is for 
 * 
 * @Modify History: 
 *  Ver   Who        Date         Changes
 * ----- ------     --------    --------------------------------------
 */

#ifndef BSP_ARCH_AARCH32_MMU_H
#define BSP_ARCH_AARCH32_MMU_H

#include "ft_types.h"

#define DESC_SEC (0x2)
#define MEMWBWA ((1 << 12) | (3 << 2)) /* write back, write allocate */
#define MEMWB (3 << 2)                 /* write back, no write allocate */
#define MEMWT (2 << 2)                 /* write through, no write allocate */
#define SHAREDEVICE (1 << 2)           /* shared device */
#define STRONGORDER (0 << 2)           /* strong ordered */
#define XN (1 << 4)                    /* eXecute Never */
#define AP_RW (3 << 10)                /* supervisor=RW, user=RW */
#define AP_RO (2 << 10)                /* supervisor=RW, user=RO */
#define SHARED (1 << 16)               /* shareable */

#define DOMAIN_FAULT (0x0)
#define DOMAIN_CHK (0x1)
#define DOMAIN_NOTCHK (0x3)
#define DOMAIN0 (0x0 << 5)
#define DOMAIN1 (0x1 << 5)

#define DOMAIN0_ATTR (DOMAIN_CHK << 0)
#define DOMAIN1_ATTR (DOMAIN_FAULT << 2)

/* device mapping type */
#define DEVICE_MEM (SHARED | AP_RW | DOMAIN0 | SHAREDEVICE | DESC_SEC | XN)
/* normal memory mapping type */
#define NORMAL_MEM (SHARED | AP_RW | DOMAIN0 | MEMWBWA | DESC_SEC)

struct mem_desc
{
    u32 vaddr_start;
    u32 vaddr_end;
    u32 paddr_start;
    u32 attr;
};

#endif